Senior FPGA Engineer - Project Discovery
Job Details
New ideas are all around us, but only a few will change the world. That’s our focus at JPL. We ask the biggest questions, then search the universe for answers—literally. We build upon ideas that have guided generations, then share our discoveries to inspire generations to come. Your mission—your opportunity—is to seek out the answers that bring us one step closer. If you’re driven to discover, create, and inspire something that lasts a lifetime and beyond, you’re ready for JPL.
Located in Pasadena, California, JPL has a campus-like environment situated on 177 acres in the foothills of the San Gabriel Mountains and offers a work environment unlike any other: we inspire passion, foster innovation, build collaboration, and reward excellence.
Formed in 1936, the NASA Jet Propulsion Laboratory is a federally funded research and development center managed for NASA by the California Institute of Technology (Caltech.) JPL joined NASA as an FFRDC when the agency was founded in 1958.
JPL helped open the Space Age by developing America’s first Earth-orbiting science satellite, creating the first successful interplanetary spacecraft, and sending robotic missions to the solar system.
Today JPL continues its world-leading innovation, implementing programs in planetary exploration, Earth science, space-based astronomy and technology development while applying its capabilities to technical and scientific problems of national significance.
Above all, we are explorers. At JPL we promote collaboration, innovation, integrity, and excellence in distinct academic areas. We turn ideas for science investigation into the reality of groundbreaking space missions, partnering with our strategic business teams to guide JPL into the future.
Project Discovery Reentry Program Description
JPL understands that we all have different life and career journeys, and we invite you to make us your next step. The Project Discovery reentry program marks the next milestone of inclusivity at JPL as a commitment to equitable career development and advancement opportunities. If you have taken a career break and are ready to return to work – this program is for you!
JPL and Project Discovery are part of the STEM Reentry Task Force, the groundbreaking career reentry initiative co-led by the Society of Women Engineers and iRelaunch.
The JPL Project Discovery Re-Entry program is looking for talented professionals who are looking to restart their careers after an absence from the workforce for one or more years. This paid one-year returnship role will enable you to work on projects that match your expertise, interests and abilities and could lead to full-time employment. During the returnship program you will have the opportunity to update your skills in a contemporary work environment. You will have access to the latest tools and technologies available and work alongside multidisciplinary teams to hone your expertise and deliver on client-critical solutions. You’ll be able to experience the breadth of JPL resources while developing new skills and building new relationships.
Note: As a temporary position, this assignment may last up to 12-months. However, please note that you are not under any employment contract and your temporary employment status can be terminated at any time, with or without notice.
Responsibilities:
We are looking for an experienced FPGA Engineer IV/ Senior FPGA Engineer to join our Instrument Embedded Systems Group in the Instrument Electronics and Software Section. This group bridges the gap between instrument hardware and software and provides world-class expertise in spaceflight FPGA design.
As an FPGA Engineer IV ****/Senior FPGA Designer, you will lead the planning and execution of highly sophisticated and unique electronics systems with Laboratory wide impact.
Specific responsibilities will include:
Design FPGAs for spaceflight applications such as instrument command and data handling, instrument subsystem control, onboard data reduction, and working with microprocessors and single-board computers.
Guide teams of FPGA, hardware, and software engineers through all phases of instrument computational system development, including initial requirements capture, design definition, implementation, testing, formal V&V, delivery, and maintenance.
Lead small teams to develop and test FPGAs in a mixed hardware/software environment and deliver the product to the next level of integration.
Follow the JPL FPGA development process and associated assurance process for planning, development, verification, and delivery of spaceflight FPGA products.
Qualifications:
Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related technical field with a minimum of 9 years of related experience; or a Master’s degree in similar subject areas with a minimum of 7 years of related experience; or a PhD in similar subject areas with a minimum of 5 years of related experience
Broad ranging experience and extensive knowledge in the following areas: digital systems, embedded systems, FPGA development, implementation of data processing and control architectures in a mixed hardware/software environment
Extensive experience designing and/or verifying FPGAs for high reliability applications (spaceflight applications strongly preferred but other applications considered)
Extensive experience with SystemVerilog, Verilog, VHDL.
Experience with SystemVerilog (all new designs will require SystemVerilog)
Preferred Skills:
Experience with Xilinx Kintex UltraScale FPGAs
Experience with Microsemi RTG4, RTProASIC3, and/or RTAX FPGAs
Experience with UVM, regression testing, and automated testing for FPGA verification
Thorough understanding of spaceflight instrument development and testing from component level to system level
Broad knowledge of industry practices and standards across a range of applications related to systems engineering, hardware engineering, and software engineering.
JPL has a catalog of benefits and perks that span from the traditional to the unique. This includes a variety of health, dental, vision, wellbeing, and retirement plans, paid time off, learning, rideshare, childcare, flexible schedule, parental leave and many more. Our focus is on work-life balance, and living healthy, fulfilling lives as we Dare Mighty Things Together. For benefits eligible positions, benefits are effective the first day of the month coincident with or immediately following the employee’s start date.
For further benefits information click Benefits and Perks
The hiring range displayed below is specifically for those who will work in or reside in the location listed. In extending an offer, Jet Propulsion Laboratory considers factors including, but not limited to, the candidate’s job related skills, experience, knowledge, and relevant education/training. Hiring range for this job may be adjusted based on primary work location outside of Pasadena, California. This adjusted range will be provided to candidates by the Recruiter when applicable.
The typical full time equivalent annual hiring range for this job in Pasadena, California.
$143,936 - $180,960
JPL is an Equal Opportunity Employer. All qualified applicants will receive consideration for employment without regard to sex, race, color, religion, national origin, citizenship, ancestry, age, marital status, physical or mental disability, medical condition, genetic information, pregnancy or perceived pregnancy, gender, gender identity, gender expression, sexual orientation, protected military or veteran status or any other characteristic or condition protected by Federal, state or local law.
In addition, JPL is a VEVRAA Federal Contractor.
Pay Transparency Nondiscrimination Provision
The Jet Propulsion Laboratory is a federal facility. Due to rules imposed by NASA, JPL will not accept applications from citizens of designated countries or those born in a designated country unless they are Legal Permanent Residents of the U.S or have other protected status under 8 U.S.C. 1324b(a)(3). The Designated Countries List is available here.
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